Buck converters are switching voltage regulators that operate in a step down method to provide a voltage output that is smaller than the input voltage. It accomplishes this by causing the circuit topology to change by virtue of turning on and off semiconductor devices. It uses signal switching to transfer energies into inductors. It uses a low pass filter scheme to eliminate high frequency harmonics to maintain a relatively constant output voltage and reduce the ripple of the output.
Typically buck converters use a feedback circuit to regulate the output voltage in the presence of load changes. They are more efficient at the cost of additional components and complexity. Buck converters can be made very compact. Therefore they are popularly used for mobile devices, printed circuit boards, even in integrated circuit packages.
An example of a prior art buck converter circuit 500 is illustrated in a circuit schematic block diagram in FIG. 5. The circuit 500 includes a pair of complementary switches SW1 and SW2, a driving switch pair SW11 and SW12, a driving switch pair SW21 and SW22, and phase driving buffers 570 and 572.
The phase control signal Vc1 and Vc2 are complementary to each other. Vc1 is coupled to the input of the buffer 570 while Vc2 is coupled to the input of buffer 572. The P type switch SW11 and N type switch SW12 form a complementary switch. Their input 540 is coupled to the output of 570. Their output 538 is coupled to the gate of the P type switch SW1. The P type switch SW21 and N type switch SW22 form a complementary switch. Their input 550 is coupled to the output of 572. Their output 548 is coupled to the gate of the N type switch SW2. Switch SW1 and SW2 forms a complementary switch with the output 516. 516 is usually connected to an output inductor and the output of the inductor is usually filtered by a capacitor.
In the conventional buck converter as shown in FIG. 6, to drive SW1, the drain of the P type switch SW11 is coupled to the voltage VIN while the source of the N type switch SW12 is coupled to the common ground VCOM. To drive SW2, the drain of the P type switch SW21 is coupled to the voltage VIN while the source of the N type switch SW22 is coupled to the common ground VCOM. The voltage dynamic range of the switch SW1 and SW2 are VIN to VCOM.
The main sources of power loss in a buck converter are resistive losses, switching losses, magnetic losses in the inductor coupled to the output VLX, and resistive losses in the inductor coupled to the output VLX.
The resistive losses in SW1 and SW2 are roughly in proportional to I2R where R is the resistance of SW1 and SW2 and I is the load current.
Switching losses are caused by switching SW1 and SW2. Gate capacitances of SW1 and SW2 are charged or discharged during the switching. Charging a capacitor necessarily results in losing half the energy stored on the capacitor once charged. These losses are roughly proportional to CV2 where C is the gate capacitance and V is the gate voltage.
At low output currents, switching losses and the magnetic losses tend to dominate. As switching frequency increases, switching losses increase proportionally. For bucks designed for very high output currents, gate losses tend to dominate over magnetic losses and eventually restrict the maximum efficiency bucks can achieve.
Mutliphase bucks use several phases to provide the output current. Each phase has its own inductor and the inductors' outputs are then shorted together at the filter capacitor. These circuits offer several benefits over a larger single-phase buck. They are typically faster to respond with higher bandwidth and lower output impedance.
In many multi-phase bucks the buck is operated in two distinct modes: a low current mode and a high current mode. In the low current mode, often the buck is operated with less than the maximum number of phases. In this case the remaining phases are only turned on once the load current is increased.
In the present disclosure, buck efficiencies for the low and mid load currents are further improved with no penalty to the high load efficiency.